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Arm introduces TLBID support to the Linux kernel to improve high-core-count CPU performanceArm 为 Linux 内核引入 TLBID 支持,提升高核心数 CPU 性能

IT House News on October 4, Phoronix discovered today that Arm submitted an initial set of patches to the Linux kernel this week to support the upcoming TLBI Domains (TLBID) feature. This technology is designed to reduce the number of TLB (…

IT之家 10 月 4 日消息,Phoronix 今日发现,Arm 本周向 Linux 内核提交了一组初始补丁,着手支持即将推出的 TLBI Domains(TLBID)功能。 该技术旨在减少高核心数处理器执行 TLB(…

2026年10月4日 发布 · 2 分钟阅读 · 免费

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IT House News on October 4, Phoronix discovered today that Arm submitted an initial set of patches to the Linux kernel this week to support the upcoming TLBI Domains (TLBID) feature. This technology is designed to reduce the system overhead when high-core processors perform TLB (Translation Lookaside Buffer, conversion lookaside buffer) failure operations, thereby improving the performance of large-scale multi-core Arm systems. IT Home Note: TLB is an important structure used by the processor to cache the results of virtual address to physical address translation. When the operating system needs to invalidate part of an address map, it typically needs to send TLB invalidation instructions to multiple CPU cores. In systems with a large number of cores, significant synchronization and communication overhead can be incurred if a TLB invalidation is performed on the entire system every time. The core change in TLBID is to allow the operating system to perform TLB invalidation only for a subset of CPU cores, rather than having to cover the entire system each time. Arm is improving related support for the Linux kernel, enabling the kernel to send TLBI instructions based on the CPU cores that the process has actually run on, and only let the relevant CPU perform TLB cleanup. This mechanism is primarily targeted at high core count Arm server processors. For server workloads running across a large number of CPU cores, avoiding unnecessary system-wide TLB invalidations is expected to reduce synchronization overhead between processors. However, Arm has not yet announced the actual performance test data of TLBID, so its specific benefits still need to be verified by subsequent hardware and software. In addition to the Linux kernel itself, TLBID support for the ARM64 architecture also requires corresponding instruction support from the compilation tool chain. Related work currently relies on LLVM 23 and newer versions, or GNU Binutils 2.46 and newer versions. The patch submitted by Arm is still in the early stages of development. As relevant architecture specifications, compilers, and Linux kernel support gradually improve, future high-core-count Arm server processors equipped with TLBID are expected to utilize more sophisticated TLB failure mechanisms to reduce memory management overhead in large-scale multi-core systems.

中文

IT之家 10 月 4 日消息,Phoronix 今日发现,Arm 本周向 Linux 内核提交了一组初始补丁,着手支持即将推出的 TLBI Domains(TLBID)功能。 该技术旨在减少高核心数处理器执行 TLB(Translation Lookaside Buffer,转换后备缓冲区)失效操作时的系统开销,从而提升大规模多核心 Arm 系统的性能。 IT之家注:TLB 是处理器用于缓存虚拟地址到物理地址转换结果的重要结构。当操作系统需要使部分地址映射失效时,通常需要向多个 CPU 核心发送 TLB 失效指令。在核心数量较多的系统中,如果每次都对整个系统执行 TLB 失效,就可能产生明显的同步和通信开销。 TLBID 的核心变化是允许操作系统只针对部分 CPU 核心执行 TLB 失效,而不必每次都覆盖整个系统。Arm 正在为 Linux 内核完善相关支持,使内核能够根据进程实际运行过的 CPU 核心发送 TLBI 指令,仅让相关 CPU 执行 TLB 清理。 这一机制主要是针对高核心数 Arm 服务器处理器。对于在大量 CPU 核心之间运行的服务器工作负载,避免不必要的全系统 TLB 失效操作,有望减少处理器之间的同步开销。不过,目前 Arm 尚未公布 TLBID 的实际性能测试数据,因此其具体收益仍有待后续硬件和软件验证。 除了 Linux 内核本身,ARM64 架构的 TLBID 支持还需要编译工具链提供相应的指令支持。目前相关工作依赖 LLVM 23 及更新版本,或者 GNU Binutils 2.46 及更新版本。 Arm 此次提交的补丁目前仍属于早期开发阶段。随着相关架构规范、编译器以及 Linux 内核支持逐步完善,未来搭载 TLBID 的高核心数 Arm 服务器处理器有望利用更精细的 TLB 失效机制,降低大规模多核心系统中的内存管理开销。

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